1. Field of the Invention
The present invention relates to a technique of manufacturing a semiconductor integrated circuit device and a probe card, particularly relates to a technique which is effective by being applied to an electric testing of a semiconductor integrated circuit which is carried out by bringing a stylus of a probe card into press contact with an electrode pad of a semiconductor integrated circuit device.
2. Description of Related Art
In Japanese Patent Application Laid-open Nos. 7-283280, 8-50146 (corresponding to International Publication No. WO 95/34000), 8-201427, 10-308423, 11-23615 (corresponding to U.S. Pat. No. 6,305,230), 11-97471 (corresponding to European Patent No. EP1022775), 2000-150594 (corresponding to European Patent No. EP0999451), 2001-159643, 2004-144742, 2004-132699, 2004-288672, 2005-24377, 2005-136302 and 2005-136246, a structure of a prober including a stylus (contact terminal), an insulating film and a leader wiring formed by using a technique of manufacturing a semiconductor integrated circuit device, a manufacturing method thereof, and a technique of enabling a probe testing by using the prober for a chip in which a test pad is formed with a narrow pitch are described.
There is a probe testing as a technique of testing a semiconductor integrated circuit device. The probe testing includes a function test for confirming whether the device is operated in accordance with a predetermined function, or a test for determining acceptable product/unacceptable product by carrying out a test of a DC operation characteristic and an AC operation characteristic. In a probe testing, there is used a technique of carrying out a probe testing in a wafer state from requests in correspondence with wafer delivery (quality differentiation), in correspondence with KGD (Known Good Die) (promotion of yield of MCP (Multi-Chip Package)), and a reduction in total cost.
In recent years, multifunction formation of a semiconductor integrated circuit device has been progressed and it has been promoted to fabricate plural circuits in a single piece of a semiconductor chip (hereinafter, simply described as chip). Further, in order to reduce fabrication cost of a semiconductor integrated circuit device, it has been promoted to miniaturize a semiconductor element and a wiring, reduce an area of a semiconductor chip (hereinafter, simply described as chip), and increase a number of acquired chips per sheet of a semiconductor wafer (hereinafter, simply described as wafer). Therefore, not only a number of test pads (bonding pads) is increased but also the test pads are arranged by a narrow pitch, and also an area of the test pad is reduced. When a prober having a stylus in a cantilever shape is going to be used for the probe testing, there is present a problem that it is difficult to install the stylus in accordance with a position of arranging the test pad since the test pads are arranged by a narrow pitch.
Further, in accordance with large capacity formation of a memory product constituting a kind of a semiconductor integrated circuit device, or an increase in a memory included logic product similarly constituting a kind of a semiconductor integrated circuit device, a time period required for testing a probe in a wafer state is increased. Therefore, it is requested to increase throughput of a probe testing in a wafer state. In order to increase the throughput, it is requested to shorten a time period required for testing per sheet of a wafer. For example, a time period T0 required for testing per sheet of a wafer is represented by T0=(T1+T2)×N+T3 when a time period required for one time testing of a testing apparatus is designated by notation T1, a time period required for index of a prober is designated by notation T2, a number of times of bringing a stylus (probe needle) provided to a prober into contact with a wafer (hereinafter, described as a number of times of touch down) is designated by notation N, and a time period required for interchanging a wafer is designated by notation T3. In view of the equation, in order to promote the throughput of the probe testing in the wafer state, it is a problem to reduce the number of times of touch down. Further, at high temperatures, there is increased an awaiting time period by an amount of a time period of finishing thermal bending.
The inventors have investigated on a technique of capable of realizing a probe testing even for a chip a test pad of which is formed by a narrow pitch by using a prober having a stylus formed by a technique of manufacturing a semiconductor integrated circuit device, and particularly investigated on a prober capable of carrying out a probe testing summarizingly for plural chips. In the investigation, the inventors have found the following problem.
That is, the stylus is a portion of a thin film probe formed by carrying out deposition of a metal film and a polyimide film and a patterning thereof by using a technique of manufacturing a semiconductor integrated circuit device, and is provided on a side of a main face of a thin film probe opposed to a chip constituting an object of testing. In probe testing, by, for example, a press piece comprising 42 alloy and having a flat press face, the thin film probe of a region formed with a stylus is pressed from a back face on a side opposed to the main face. At this occasion, when a difference is brought about in heights of tips of all of styluses and a height of a test pad corresponding thereto, there is a concern of a drawback of bringing about a test pad in correspondence with a stylus which cannot be brought into contact therewith. Therefore, in probe testing, a problem is posed by firmly bringing a test pad in correspondence with all the styluses into contact therewith.
Further, in order to form a thin film probe capable of carrying out probe testing summarizingly for plural chips, a number of wirings electrically connected to a stylus are led around in a thin film probe. Therefore, there is a concern of varying a wiring density in a thin film probe and deteriorating flatness of a thin film probe. When the flatness of the thin film probe is deteriorated, there poses a problem that when a thin film probe is pressed by a press piece in probe testing, a variation is brought about in heights of tips of styluses, and styluses having a low height of a tip cannot be brought into contact with a test pad.